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m02046 evaluation module user guide 02046-EVMD-001-B april, 2005
? 2005, mindspeed technologies tm , inc. all rights reserved. information in this document is provided in connection with mindspeed technologies tm ("mindspeed tm ") products. these materials are provided by mindspeed as a service to its customers and may be used for informational purposes only. except as provided in mindspeed?s terms and conditions of sale for such products or in any separate agreement related to this document, mindspeed assumes no liability whatsoever. mindspeed assumes no responsibility for errors or omissions in these materials. mindspeed may make changes to specifications and product desc riptions at any time, without notice. mindspeed makes no commitment to update the information and shall have no responsibi lity whatsoever for conflicts or incompatibilities arising fro m future changes to its specifications and product descriptions. no license, express or implied, by estoppel or otherwise, to an y intellectual property rights is granted by this document. these materials are provided "as is" without warra nty of any kind, either express or implied, relating to sale and/or use of mindspeed products including liability or warranties relating to fitness for a particular purpo se, consequential or incidental damages, merchantability, or infringement of any patent, co pyright or other intellectual property right. mindspeed further does not warrant the accuracy or completeness of the information, text, graphics or other items contained within these materials. mindspeed shall not be liable for any special, indirect, incidental, or consequential damages, including without limitation, lost revenues or lost profits, which may result from the use of these materials. mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. mindspeed customers using o r selling mindspeed products for use in such applications do so at their own risk and agree to fully indemnify mindspeed for any damages resulting from such improper use or sale. 02046-EVMD-001-B mindspeed technologies? revision history revision level date description b final april 2005 completely re-wri tten and expanded. a final october 2001 initial release
02046-EVMD-001-B mindspeed technologies? 1 - 1 1.0 operation of evaluation module 1.1 functional description the m02046 evaluation module has been designed to demonstrate the performance of all versions of the m02046 in a qsop pa ckage. the m02046 is a highly integrated limiting amplifier targeted for use in optical receivers operating up to 1.25 gbps and is compatible in designs which currently use the mindspeed mc2046 limiting amplifier. the evaluation module enable s the user to investigate th e full functionality of the device and the programming of the signal detect level. the high speed data inputs and outputs are ac-coupled, with controlled impedance lines and good quality sma connectors providing the interface to test equipment. features: ? supports all versions of the part -14 (3.3v only, cmos st output) -15 (3.3/5v, cmos st output -24 (3.3v only, pecl st output) -25 (3.3/5v, pecl st output) ? sma connectors for all high -speed i/o connections with ac-coupling to the ic allowing direct connection of inputs and outputs to test equipment ? operates with differential input levels up to 1200 mv pp ? signal detected (sd) indication ? optional rosa connection pads programmability ? selectable data output power down/squelch operation (jam) ? selectable signal detect led operation ? signal detect threshold level ad justment (with resistor change) test points available ? signal detect and los outputs ? jam input ? vcc3 input voltage in 3.3v operation ? 3.3v regulator output vo ltage in 5v operation ? st/los threshold setting voltage (stset)
1-2 mindspeed technologies? 02046-EVMD-001-B operation of evaluation module m02046 evaluation module user guide figure 1-1. typical 1.25 gbps eye diagram figure 1-2. m02046 on an mc2046 evm 10 mv pp differential input 1.25 gbps 160 mv/div 140 ps/div enable signal detect led header +v cc connection + gnd optional rosa connection signal detected led data outputs enable jam header data inputs
02046-EVMD-001-B mindspeed technologies? 1 - 3 m02046 evaluation module user guide operation of evaluation module 1.1.1 power a single positive 3.3v ( 7.5%) or 5v ( 7.5%) power supply is required to power this module. power is applied via 3 pin header hd1. either 3.3v or 5v is applied to pin 1 and ground is connected to either pin 2 or 3. the correct polarity can be verified by c18, the 10uf electrolytic capacitor adja cent to hd1 which has a marking on its positive connection. the typical operating current of the evm un der nominal conditions is 50 - 55 ma. 1.1.2 data inputs data is applied via sma edge launched connectors sk1 and sk2. the module is designed to accommodate differential i nput signals up to 1200 mvpp (600 mv pp single-ended). since the inputs are ac-c oupled, the input common mode level is rejected. 1.1.3 pecl data outputs the differential data pecl outputs are available at the sma outputs sk3 and sk4 and can be directly connected to 50 ? test equipment. note th at a true pecl load is 50 ? to v cc - 2v. in practice, the thevenin equivalent is used because of the difficulty of creating the v cc - 2v voltage. however, the thev enin equivalent has the drawback of being dependent on the actual v cc voltage. the m02046 evm allows the user through component selection to setup several possible output termination configuratio ns. both outputs have two resistive connections: one provid es a pull-up to v cc and the other provides a pull-down to ground. resistors r4 and r5 connect their respective output to v cc while r12 and r13 connect their respective output to grou nd. the actual values used are determined by the value of v cc and whether or not true pecl output levels are required. ta b l e 1 - 1 lists the possible combinations. note: this evm supports both the 3.3v only versions of the part (-14 and -24) and the 3.3/5v versions (-15 and -25). please note which device is present on the evm before applying 5v. note: this evm comes configured for 3.3v operation. for 5v opera- tion first ensure the device is a -15 or -25 revision and then change the output pecl termination resistors (r12 and r13) from 150 ohm to 300 ohm.
1-4 mindspeed technologies? 02046-EVMD-001-B operation of evaluation module m02046 evaluation module user guide 1.1.4 signal detect (st) and loss of signal function (los) the signal detect threshold is established by r st (reference design ator c1 on the evm) between pins one (st set ) and two of the device. the default factory value is 7.50 k ? which corresponds to an st assert level of ~8 mv pp and an st deassert level of ~5 mv pp . when the differential input voltag e is greater than the programmed threshold at st set , st is asserted and los is de-a sserted. decreasing the differential input level below the st set threshold de-asserts st an d asserts los. connecting header hd3 will illuminate led ld1 when th e differential input signal is above the st threshold, i.e. "signal present", and turn the led off when loss of signal has occurred. to adjust the st threshold level, r st must be replaced with a new value. figure 1-3 has been included to aid the select ion of the appropri ate resistance r st and desired st threshold setting level. more detailed description of the st fu nction is included in the data sheet. table 1-1. termination resistor values supply r pull-down (r12 and r13) r pull-up (r4 and r5) c ac (c7 and c8) note 3.3 v 150 open 100 nf this is the default condition for the evm. pseudo 3.3v pecl termination re commended for driving a bert without reducing the e dge speed. however, is not a valid pecl load and does not meet the pe cl voh and vol requirements. 5.0 v 300 open 100 nf pseudo 5v pecl termination re commended for driving a bert without reducing the e dge speed. however, is not a valid pecl load and does not meet the pe cl voh and vol requirements. 3.3 v 130 82 shorted thevenin equivalent 3.3v pecl te rmination. when driving into a high-z load will give valid pecl voltage levels. however, voltage level exceeds the maximum input levels for a typical bert. 5.0 v 82 130 shorted thevenin equivalent 5.0v pecl te rmination. when driving into a high-z load will give valid pecl voltage levels. however, voltage level exceeds the maximum input levels for a typical bert. 3.3 v 130 82 100 nf thevenin equivalent 3.3v pecl termination suitable for driving a bert. however, the addition of the 50 ? bert input impedance will decrease the edge speed as noted below. 5.0 v 82 130 100 nf thevenin equivalent 5.0v pecl termination suitable for driving a bert. however, the addition of the 50 ? bert input impedance will decrease the edge speed as noted below. note: terminating the outputs with an equivalent thevenin pecl load and ac-coupling to 50 ? test equipment presents a load to the pecl outputs requiring more current than the defined pecl termination of 50 ? to v cc - 2v. this will attenuate the output swing slightly and reduce edge speeds seen at the 50 ? test equipment.
02046-EVMD-001-B mindspeed technologies? 1 - 5 m02046 evaluation module user guide operation of evaluation module figure 1-3. signal detect characteristic (full range) figure 1-4. signal detect characteristic (low input signal) threshold level (mv pp ) r st (k ? ) 0 10 20 30 40 50 60 70 80 90 100 110 5.3 5.5 5.7 5.9 6.1 6.3 6.5 6.7 6.9 7.1 7.3 7.5 7.7 7.9 optical hysteresis de-assert assert = 10*log 10 (de-assert/assert) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c threshold level (mv pp ) r st (k ? ) 0 5 10 15 20 25 30 6.5 6.7 6.9 7.1 7.3 7.5 7.7 7.9 optical hysteresis = 10*log 10 (de-assert/assert) de-assert assert 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c
1-6 mindspeed technologies? 02046-EVMD-001-B operation of evaluation module m02046 evaluation module user guide 1.1.5 jam jam is a cmos compatible input that can be used to inhibit the data outputs when forced to a logic high. if connected directly to the los output pin, then when los is asserted the data outputs will be forced to logic ?one? state ensuri ng that no data is propagated through the system. header hd2 (j am control) provides the flexibility to either connect los to jam or leave unconnected. figure 1-5. signal detect characteristic (high input signal) threshold level (mv pp ) r st (k ? ) 20 30 40 50 60 70 80 90 100 110 120 130 5.3 5.5 5.7 5.9 6.1 6.3 6.5 optical hysteresis de-assert assert = 10*log 10 (de-assert/assert) 1.25 gbps, 2 31 - 1 conditions: vcc = 3.3v, temp = 25c
02046-EVMD-001-B mindspeed technologies? 2 - 1 2.0 evm bill of materials table 2-1. bill of materials qty vendor part number reference designators description 1 koa rk73h1jltd75000 c1 (r st ) res chip thick film 7.50k ohm 1/10w 1% 0603 3 kemet electronics c0603c104k5ractu c2-c4 cap ceramic 50v 0.1uf 10% x7r 0603 1 yageo america 9c06031a0r00jlhft c5 (3.3 v only) res 0.0 ohm 1/10w 5% 0603 smd 1 c5 (3.3/5v) no connect 5 kemet electronics c0603c104k5ractu c6-c1 0 cap ceramic 50v 0.1uf 10% x7r 0603 5 c11 - c15 typically no connect 2 kemet electronics c0603c101k5ractu c16, c17 cap ceramic 50v 100pf 10% x7r 0603 5 panasonic ecj-3yf1a106z c18 cap ceramic 10v 10uf +80/-20% y5v 1206 2 sullins electronics pzc03saan hd1, hd2 header male 3 pin 100 mil straight single row 1x3 1 sullins electronics pzc02saan hd3 header male 2 pin 100 mil straight single row 1x2 2 l1, l2 typically no connect 2 murata blm21rk601sn1 l3, l4 in ductor chip fe rrite 600 ohm at 100mhz, 200ma, 0805 1 kingbright aa3528src ld1 3.5x2.8 mm smd chip led vf = 1.85v at id = 20ma 4 johnson components 142-0701-201 j1, j2, j3, j4 vertical through-hole sma connector 3 r1, r2, r3 typically no connect 2koa rk73h1jltd1300f r4, r5 typically open (optional thevenin pecl high termination. 130 ? for v cc = 3.3v, 82 ? for v cc = 5v and also use r11 and r12) res chip thick film 130 ohm 1/ 10w 1% 0603 rk73h1jltd82r5f res chip thick film 82.5 ohm 1/ 10w 1% 0603 3 yageo america 9c06031a0r00jlhft r6, r7 , r8 res 0.0 ohm 1/10w 5% 0603 smd
2-2 mindspeed technologies? 02046-EVMD-001-B evm bill of materials m02046 evaluation module user guide 1 bourns, inc. 3214w-1-202g r9 re s adjustable 2kohm 1/2w 10% 4mm square smd top adjust 2 koa rk73h1jltd1000f r10, r11 res chip thick film 100 ohm 1/ 10w 1% 0603 2koa rk73h1jltd1500f r12, r13 typically, r12 = r13 = 150 ? for v cc = 3.3v and r12 = r13 = 300 ? for v cc = 5v for optional thevenin pecl low termination. 82 ? for v cc = 3.3v, 130 ? for v cc = 5v and use r4 and r5 res chip thick film 150 ohm 1/ 10w 1% 0603 rk73h1jltd3010f res chip thick film 300 ohm 1/ 10w 1% 0603 rk73h1jltd1300f res chip thick film 130 ohm 1/ 10w 1% 0603 rk73h1jltd82r0f res chip thick film 82.0 ohm 1/ 10w 1% 0603 1 r14 no connect 1 r15 (cmos status output versions -14 or - 24 only) 1 koa rk73h1jltd5100f r15 (pecl status output versions -15 or -25 only) res chip thick film 510 ohm 1/ 10w 1% 0603 11 keystone 5012 tp1- tp6 whi te through_hole pc test point, with eye 1 mindspeed technologies m02046 u1 limiti ng amplifier table 2-1. bill of materials qty vendor part number reference designators description
02046-EVMD-001-B mindspeed technologies? 3 - 1 3.0 schematics and layout 3.1 board layout figure 3-1. board layout
3-2 mindspeed technologies? 02046-EVMD-001-B schematics and layout m02046 evaluation module user guide 3.2 schematics figure 3-2. schematic diagram rset c2 0.1 f c3 r1 n/c c12 n/c r2 n/ c r6 0 ? data_in data_inb ph ot o_ gn d sk1 sk2 r7 0 ? l1 n/ c l2 n/ c c13 n/ c l3 l4 c4 c6 c16 10 0 pf r9 0 ? r10 12 .1 k ? vcc_b c14 n/ c c15 n/c vcc_b r12 150 ? r13 15 0 ? c7 c8 sk3 sk4 da ta outputs c17 10 0 pf c9 r14 nc r15* 510 ? tp1 tp2 tp3 1 2 3 hd 1 3. 3v / 5 v 0v + c18 10 f rset sets signal detect th resh ol d vcc_a vcc_c r11 interface to integrated pi na mp sk5 sk6 sk7 sk8 power c10 tp4 tp5 tp6 data in data inb dou t doutb r3 n/c 1 2 3 hd2 jam control ld 1 1 2 hd3 r8 0 ? vcc_a link detected connect/disconnect link detect led thi s ev b dem ons trates the m 02 04 6 usi ng the mc 20 46 ev b note that pin 7, ?vcc3? is only conn ected to the supply if it is 3.3v version (-14 or -24). components shown in light grey are n ot fitted for evaluation of this part . this evaluation board can accept inputs from either a in tegrated pin and t ia module (pinamp) or from a signal generator. the standard conf iguration (shown) supports differential operation from an external signal source. if using an integrated pinamp then components can be added to implement a 3rd order bessel filter if requir ed. this device will op erate from 3.3v to 5v supplies. the components shown have been selected for 3.3v operation. for 5v operation: r 12 & r1 3 s houl d be chang ed to 30 0 ? . c5 should be opened. * for parts with cmos status outpu ts: r15 should be removed (open circuited). notes: r4 n/c r5 n/ c vcc 14 peclp 13 pecln 12 gn d 11 st 10 los 9 ja m 8 vcc 3 7 din n 5 din p 4 gn d 3 vcc 3 2 sts et 1 iref 16 nc 15 nc 6 u1 m02046 qsop16 ph ot o_ vcc 0 ? n/ c c5 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f

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